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Dr. Sadhana Rai

Associate Professor, Computer Science & Engineering

Teaching Experience

:

10 Years

Industry Experience

:

0.0 Year

Research Experience

:

5 Years

QUALIFICATION

COURSESSPECIALIZATIONINSTITUTIONUNIVERSITY
BEComputer ScienceSrinivas Institute of technology, MangaloreV T U
M.Tech.Computer ScienceNMAMIT,NitteV T U
Ph.DCSENITK NITK

Professional body Membership

  • Professional body Membership

Professional body Membership

Indian Society for Technical Education (ISTE)

RESEARCH

  • Current Research

  • Awards

  • Grants

  • Research Supervision

Current Research

Computer Architecture-Hybrid Memories, Machine Learning

Publications

  • International Journals

  • Conference Publication

  • Books/Book chapter published

International Journals

HD Kallinatha, Sadhana Rai, Basavaraj Talawar: A Detailed Study of SOT-MRAM as an Alternative to DRAM Primary Memory in Multi-Core Environment, IEEE Access

Sadhana Rai, Basavaraj Talawar, Challenges in design, data placement, migration and power-performance trade-offs in dram-nvm-based hybrid memory systems, IETE Technical Review

Sadhana,Savitha Shetty, Analysis of diabetic data set using hive and R, International Journal of Emerging Technology and Advanced Engineering

K Abhishekkumar, Sadhana: Survey report on K-means clustering algorithm, K. Abhishekkumar, C. Sadhana, Survey report on K-means clustering algorithm, Int. J. Mod. Trends Eng. Res 4 (2017)

Patents

  • International Patents

  • Indian Patent

International Patents

No International Patents found

Conferences

  • International conference Attended

  • National conference Attended

International Conferences

SOT-MRAM Based Main Memory: An Alternative to DRAM, 2022 8th IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT)

Migration and Replacement in Main Memory and Cache in Hybrid Memory, Advanced Computing and Communications: Responsible AI: 29th International Conference, ADCOM 2024, Bangalore, India, December 18–20, 2024, Proceedings

History aware interference distance based Page replacement policy for Hybrid Memory,IEEE 31st International Conference on High Performance Computing, Data and Analytics Workshop (HiPCW)

DAIR: Data-Aware Inter-Reference distance based cache replacement for LLC in Systems with Hybrid Memory,HiPC 2023 Student Research Symposium (HiPC SRS 2023)

Analysis of power-performance trade-offs in DRAM-NVM based hybrid main memory,International Conference on Applied Computational Intelligence and Analytics (ACIA-2022)

Others

  • FDP/ Workshop /Seminar Attended

  • FDP Organised

  • Certification

FDP/ Workshop /Seminar Attended

Attended a workshop -“Artificial Intelligence for Computer Vision and Medical Image Processing” jointly organized by Electronics & ICT Academies held from 14th July – 24th July, 2025

Resource Person for Computer Architecture: A Future Perspective for ML and DL" for FDP ENVISIONING THE FUTURE: Deep Dive into Advanced Artificial Intelligence and Machine Learning Technologies for Society at NMAMIT Nitte