FACULTY PROFILE

MS. Srividya S

MS. Srividya S

  • Department: Computer Science & Engineering
  • Designation: Assistant Professor
  • Teaching Experience: 2.9 Years
  • Industry Experience: 1.4 Years
  • Research Experience: NIL
COURSES SPECIALIZATION INSTITUTION UNIVERSITY
B E Electronics and Communication Engineering KVG College of Engineering, Sullia VTU, Belgaum
M Tech VLSI and Embedded System SCEM VTU, Belgaum

Current Research

No Research Details Found.

Awards

No Awards Details Found.

Grants/ Fund

No Grants Details Found.

Research Supervision

No Grants Details Found.

National Patents:

No National Patents Found.

International Patents:

No International Patents Found.

No International Journals Found.

National Journals:

No. of National Journals Publications:2

  • Published a research paper entitled “Comparison of Barometric Pressure Sensors” in IJERT, Vol 3, Issue 2, Feb 2014.
  • Published a paper entitled “Implementation of Area Efficient Multiplier and Adder Architecture in Digital FIR filter” in “THE IIOAB JOURNAL”,Vol 6,July 2015.

Books

No Books Found.

No International Conferences Found.

National Conferences:

No. of National Conferences :1

Presented a paper entitled “Implementation of Area Efficient Multiplier and Adder Architecture in Digital FIR filter” in National Joint Conference on Innovations in Engineering and Technology organized by Canara Engineering College, 2015

Workshop / Seminars

    1 .   Workshop on ‘PCB Design & Technologies’ organized by CLICK, 2013

       2 .     Attended seminar on “National Education Policy 2020-Implementation and Challenges”.

       3.     Participated   in One Week AICTE-VTU Joint Training  Programme for Teachers on”An Overview of Teaching Techniques in Innovation & Design Thinking”.

     4.  Participated in One Week  AICTE-VTU Joint Training  Programme for Teachers on “An Overview of Teaching Techniques in Basics of Electronics and Communication Engineering”.

       5. Attended   two day state level seminar  on "Teaching Learning and Assessment Process as per OBE in the Higher Education Institutions in line with NEP 2020"

 

      

Projects and Exhibitions

BE Projects

Title: Mobile Bomb Disposal Unit

In   project “Mobile Bomb Disposal Unit” we propose to design a robust wireless mobile bomb disposal unit that would be capable of reaching close to the objects of threat and the real scenario can be observed through a on board video camera which can send back video feedback to the observatory.

M.Tech Project

Title:MAC Design Implementation Using Area Efficient Multiplier and Adder Architecture

 

In this project, a comparison is made between Modified Booth Algorithm and Vedic algorithm and a MAC unit is designed using area efficient Vedic multiplier and carry save adder. The algorithm is implemented using Xilinx and cadence tool. And Physical design process is obtained for two architecture as well as for MAC unit.

 

Other Activities

·         Eagle: Designing one Layer PCB having about 20 components.

·         OrCADPSpice: Schematic Diagram and Simulation of Basic Digital Circuits.

·         LT Spice: Schematic Diagram, Simulationof Basic Digital Circuits.

·         Microcontroller 8051, Verilog programming.

·         Xilinx and Cadence virtuoso (Digital Design).