FACULTY PROFILE

Mr. Manjunatha Badiger

Mr. Manjunatha Badiger

  • Department: Electronics & Communication Engineering
  • Designation: Assistant Professor
  • Teaching Experience: 8.10 Years
  • Industry Experience: NIL
  • Research Experience: NIL
COURSES SPECIALIZATION INSTITUTION UNIVERSITY
BE Electronics & Communication Engineering NMAMIT, Nitte VTU, Belgaum
M Tech VLSI Design & Embedded System Reva Institute of Technology & Management Bangalore VTU, Belgaum

Membership of Professional Bodies:

Member of International Association Of Engineers (IAENG):254920
 
International Association of Engineering and Technology for Skill Development (IAETSD): IAETSD14001086

Current Research

VLSI & Image Processing

Awards

No Awards Details Found.

Grants/ Fund

International Patent

Manjunatha Badiger et.al. “Remote Pain Monitoring System For Knee Joint Pain Of Elderly People”, Australian Patent, 2020101864- Granted

Research Supervision

No Grants Details Found.

National Patents:

No National Patents Found.

International Patents:

No International Patents Found.

International Journals:

No. of International Journals Publications:5

1. "Leaf and skin disease detection using image processing" in Global Transitions Proceedings, Volume 3, Issue 1, June 2022, 
      Pages 272-278.
2."Smart Travel Bag" in  International Journal of Engineering Research & Technology (IJERT), Volume-8, Issue-11, IETE – 2020.
 
3.“Design & Implementation of ON Chip Permutation Network for MPSOC on FPGA” in International Journal for Research in             Applied Science & Engineering Technology (IJRASET), Volume-3, Issue-4, April-2015.
 
4. "A Way Early Tag Access with Partial Tag Comparison Technique for Reducing Power Consumption of L1 Data Caches" in        International Journal for Research in Applied Science & Engineering Technology (IJRASET), Volume-3, Issue-5, May-2015.
 
5. "16 Bit Unsigned Multiplier Using Proposed CSLA" in International Journal for Research in Applied Science & Engineering                    Technology (IJRASET),Volume-3, Issue-5, May-2015.
 

6. "Design of Low Power ASK CMOS Demodulator Circuits for passive Ultra High Frequency Tag" in International Journal of            Future Computer and Communication(IJFCC), Volume-1, No. 4, December-2012.

No National Journals Found.

Books

No Books Found.

No International Conferences Found.

National Conferences:

No. of National Conferences :1

1. “Design and FPGA implementation of High Speed Linear FIR low pass filter using Kaiser Window function”. Conference: International Conference ICCCE-2012.

 

Workshop / Seminars

1. Completed Five days ATAL FDP on "Internet of Things(IoT)", from January11 - 15, 2021, organized by Central University of Kerala.
 
2. Completed Five days ATAL FDP on "Robotics", from November 3 - 7, 2020, organized by Rajiv Gandhi Proudyogiki Vishwavidyalay, Bhopal.
 
3. Participated in Four days FDP on "Applied Machine Learning Using Python" from June 9-12,2020, organized by Department of IS, NMAM Institute of Technology, Nitte.
 
4. Participated in Five Days FDP on “The Scope and impact of Open Source Technologies” from May 26-30,2020, organized by Department of CSE, Velalar College of Engineering and Technology.
 
5. Successfully completed the STTP through ICT Mode on "Development of Laboratory Instructions" from June 15-19,2020, organized by National Institute of Technical Teachers' Training & Research (NITTTR).
 
6. Participated in five days International Seminar Series on “Research Methodology” from June 01-05,2020, organized by Srinivas University, Mangaluru.
 
7. Participated in two Days FDP on "Rubby Programming" from May 11-12,2020, organized by the school of CSE, Vellore Institute of Technology, Chennai. 
 
8. Participated in two Days FDP on "Advanced C++" from May 13-14,2020, organized by the school of CSE, Vellore Institute of Technology, Chennai.
 
9. Participated in two Days FDP on "Java Programming" from May 15-16,2020, organized by the school of CSE, Vellore Institute of Technology, Chennai.
 
10.Participated in a two week workshop on “Signals and Systems” conducted by IIT Kharagpur, from 2nd to 12th of January, 2014. 
 
11.Participated in a three day workshop on “Cadence OrCAD PSPICE-The analysis and design of Electronic Circuits and Systems”, Organized by Canara Engineering college in association with ENTUPLE Technologies.
 
12.Participated in a two day workshop on “CMOS IC Design flow using Mentor Graphics EDA Tools”,Organized by SSC MUKKA in association with NICSA.
 
13.Participated in a two day workshop on “FPGA and ASIC design using Mentor Graphics Tools” Organized by MVSIT in association with Trident Techlabs.
 
14.Participated in a two days state level convention for “Academicians on free software in Research and Teaching”, Organized by REVA ITM in association with FSMK.

Projects and Exhibitions

No Projects and Exhibitions Details Found.

Other Activities

No Other Activities Details Found.