Mr. Praveen Kumar Konda
- Department: Electronics & Communication Engineering
- Designation: Assistant Professor
- Phone: +91-9591306311
- Email: firstname.lastname@example.org
- Teaching Experience: 7.5 Years
- Industry Experience: 1.0 Years
- Research Experience: NIL
|BE||Electronics & Communication||REC Bhalki||V T U Belagavi|
|M.Tech||Microelectronics and Control system||NMAMIT Nitte||VTU Belagavi|
Membership of Professional Bodies:
Microelectronics, VLSI for Signal Processing
No Awards Details Found.
Grants Received Research/Projects Guided (Beyond Academic)
No Grants Details Found.
No. of International Journals Publications:10
l Praveen Kumar, “VCO Based Injection Clock Multiplier With A Continuous Frequency Tracking Loop” IOSR Journal of Electronics and Communication Engineering, Volume 13, Issue 4, Ver. I, July –Aug. 2018.
l Praveen Kumar, “Computation of SRT and Cordic Algorithms” IOSR Journal of Electronics and Communication Engineering, Volume 12, Issue 4, Ver. II, July –Aug. 2017.
l Praveen Kumar, “ A Review on Load Positioning Application of Shape Memory Alloy” published in IJERECE Journal, Volume 4, Issue 5, May 2017.
l Praveen Kumar, “Designing a Novel Prototype to Assist and Monitor the Physically Handicapped People Using Intel Atom Processor” in Recent Patents on Computer Science. Vol 8, DOI: 10.2174/2213275908666150804194618.
l Praveen Kumar, “VLSI Implementation of High Speed-Low Power-Area Efficient Multiplier Using Modified Vedic Mathematical Techniques” ” in Recent Patents on Computer Science. Vol 8, DOI: 10.2174/2213275908666150220203501.
l Praveen Kumar, “Developing the Regressive Test Suite for DS1977 device (iButton)” in the journal of International Journal of Innovative Research in Technology (IJIRT). Volume 1, Issue 12, May 2015, Paper ID: 102296, ISSN: 2349-6002.
Praveen Kumar, “Implementation of Area Efficient Multiplier and Adder Architecture in Digital FIR Filter” presented in NJCIET -15 and published in proceedings of NCIECE 2015, ISBN: 97-8-93-81195-82-6
l Praveen Kumar, “A comparative study on object detection and tracking in video” in the journal of Engineering Research & Technology (IJERT). Vol 2, issues 12, December 2013, pp 1784-1789. ISSN: 2278-0181.
l Praveen Kumar, “PID Implementation on FPGA for Motion Control in DC Motor Using VHDL” IOSR Journal of VLSI and Signal Processing (IOSR-JVSP) Volume 6, Issue 3, Ver. II (May. -Jun. 2016), PP 116-121 e-ISSN: 2319 – 4200, p-ISSN No. : 2319 – 4197
l Has presented a Technical paper titled “Multiplier and Accumulator Architecture using Carry Save Adder” in International Conference on “Communication, Computation, Management and Nanotechnology” (ICN- 2011) held at REC Bhalki, Karnataka, India.
l Has participated in International Conference on “Computing Architecture, Networking & Applications”(ICCANA-11) at NMAM Institute of Technology Nitte, Mangalore.
No National Journals Found.
Workshop / Seminars
l Attended a STC on “Applied Optimal Control and State Estimation” Organized by Centre for Continuing Education, IISc Bangalore from 2nd to 6th July 2018.
l Attended a STC on “Analog IC Design-Circuit and Design Methodologies” conducted by Entuple technologies Pvt. Ltd Bengaluru at SCEM Mangalore from 5th to 9th Feb, 2018.
l Attended two day’s workshop on “System Design in the Era of IOT” by Prof. Joseph Sifakis-Turing Awardee, from 11th to 12th January 2018 at SCEM Mangaluru.
l Attended two day’s workshop on “Outcome Based Education and Bloom’s Taxonomy” organized by SCEM, Mangaluru from 12th to 13th July 2017.
l Attended a two days workshop on “VLSI Design Using Open Source EDA” held on29th to 30th July 2016 at SCEM, Mangaluru.
l Attended a workshop on “Nanotechnology and Sensors” Organized by IEEE Bangalore section at IISc Bangalore.
l Attended a AICTE sponsored workshop on “Advances in signal processing and its implementation using VLSI” Organized by P A college of engineering Mangalore.
l Attended a workshop on “PLC and SCADA” organized by VTU Regional center Mysore.
l Attended a workshop on “Excellent Leadership” organized by SCEM Mangalore at Ocean pearl hotel.
l Attended a workshop on “model based development and testing of safety critical control system using Mat lab” Organized by NMAMIT, Nitte in association with MOOG India Technology Center, Bangalore.
l Attended a workshop on “Application of lab view” Organized by NMAM Institute of Technology Nitte.
Projects and Exhibitions
CADENCE DESIGN CONTEST 2016: Runner-up Project, for the paper titled “VLSI Implementation of High Speed Digital Integrated Circuit for Multiplication Using Modified Vedic Mathematical Techniques” in the Undergraduate category.
Best project award in srishti-2018
NAAC Coordinator, NBA Coordinator