FACULTY PROFILE

Mrs. Megha N

Mrs. Megha N

  • Department: Electronics & Communication Engineering
  • Designation: Assistant Professor
  • Phone: 9743529986
  • Email: megha.ec@sahyadri.edu.in
  • Teaching Experience: 5 Years
  • Industry Experience: 1.0 Years
  • Research Experience: 1.0 Years
COURSES SPECIALIZATION INSTITUTION UNIVERSITY
B.E Medical Electronics Sri Siddhartha Institute of Technology Visvesvaraya Technological University
M.Tech VLSI Design and Embedded Systems Rajeev Institute of Technology Visvesvaraya Technological University

Membership of Professional Bodies:

·         Life Member of Indian Society for Technical Education (ISTE) - LM124156.

·         Life Associate Member of Institue of Electronics and Telecommunication Engineers (IETE) - AM501381.

·         Life Member of IAENG - 165839.

Current Research

VLSI Design and Embedded Systems

 

Awards

No Awards Details Found.

Grants Received Research/Projects Guided (Beyond Academic)

No Grants Details Found.

International Journals:

No. of International Journals Publications:15

1.      Published a research paper entitled, “Design and Verification of Five Port Router Network”, in IOSR Journal of Electronics and Communication Engineering (IOSR - JECE), Volume 13, Issue 2, Ver. II (Mar-Apr. 2018), PP 89-96. e-ISSN: 2278-2834, p- ISSN: 2278-8735. 

2.      Published a research paper entitled, “Information Extraction for Graph Data Using Domain Specific Ontology”, in  Sahyadri International journal of research (SIJR)  Volume3, Issue2, December 2017, ISSN:2456-186X. 

3.      Published a research paper entitled, “A Survey: Graph Theory in Computer Science and Applications”, in  International Journal of Trend in Research and Development, Volume 4(5), ISSN: 2394 - 9333 www.ijtrd.com IJTRD, Sep-Oct 2017.

4.      Published a research paper entitled, “A Study and Comparison of Lightweight Cryptographic Algorithm”, in  IOSR Journal of Electronics and Communication Engineering (IOSR-JECE), e-ISSN: 2278-2834, p - ISSN: 2278-8735, Volume 12, Issue 4, Ver. II (Jul.-Aug. 2017), PP 20 - 25. 

5.      Published a research paper entitled, “Implementation of SCN Based Content Addressable Memory”, in IOSR Journal of Electronics and Communication Engineering (IOSR-JECE), e-ISSN: 2278-2834, p - ISSN: 2278-8735, Volume 12, Issue 4, Ver. II (Jul.-Aug. 2017), PP 48 - 52. 

6.      Published a research paper entitled, “Implementation of Sobel Edge Detection using MATLAB-XILINX co-simulation”, in International Journal of Innovative Research in Electrical, Electronics, Instrumentation and Control Engineering, Vol. 5, Issue 7, July 2017 ISSN (Online) 2321 – 2004 ISSN (Print) 2321 – 5526.

7.      Published a research paper entitled, “Background Evaluation on 5G and Its Future Technologies”, in International Journal of Innovative Research in Computer and Communication Engineering (IJIRCCE), Volume 5, Special Issue 4, June 2017. 

8.      Published a research paper entitled, “Implementation of MSEA using 8 bit reversible ALU”, in International Journal of Engineering Research in Electronics and Communication Engineering (IJERECE) Volume 4, Issue 5, May 2017, ISSN (Online) 2394-6849.

9.      Published a research paper entitled, “A VLSI Architecture of Asynchronous Multiplier”, in International Journal of Engineering, Basic Sciences, Management & Social Studies, Volume 1, Issue 1, May 2017.

10.  Published a research paper entitled,  “VLSI Implementation of Low Bandwidth ECC Code”, in  International Journal of Engineering, Basic Sciences, Management and Social Studies, Volume 1, Issue 1, May 2017.

11.  Published a research paper entitled, "War Field Spy Robot", in  Sahyadri International Journal of Research, VOL 4, ISSUE 1, June-2018.

12.  Published a research paper entitled, “Implementation of Modular Reduction and Modular Multiplication Algorithms", in IOSR Journal of VLSI and Signal Processing (IOSR-JVSP), VOL 8, Issue 6, Ver. I (Nov. - Dec 2018), PP 34-38, e-ISSN: 2319 – 4200, p-ISSN No. : 2319 – 4197.

13.  Published a research paper entitled, "A Literature Review on Various SRAM Architecture", in International Journal of Technical Innovation in Modern Engineering & Science (IJTIMES), VOL 5, ISSUE 5, UGC Approved Journal, May-2019.

14.  Published a research paper entitled, "Design and Comparison of Low Power Static RAM using Cadence tool in 180nm and 45nm Technology", in  International Journal of Technical Innovation in Modern Engineering & Science (IJTIMES), VOL 5, ISSUE 5, UGC Approved Journal, May-2019.

15. Published a research paper entitled, "Zonal Feature Vectors For Kannada Hand-Written Character Recognition", in  International Journal of Technical Innovation in Modern Engineering & Science (IJTIMES), VOL 5, ISSUE 5, UGC Approved Journal, May-2019.

 

No National Journals Found.

No International Conferences Found.

National Conferences:

No. of National Conferences :1

1. Presented a paper entitled, "A FPGA implementation of SVD processor used in ICA computation for Multi-Channel EEG system", National Conference on "Emerging Trends in Electronics and Communication" (NCETEC-14) conducted on 3rd and 4th april 2014, conducted at BGSIT.

Workshop / Seminars

1. Participated in three days workshop on "Analog and Digital VLSI Design Using Cadence Tools" held on 28th to 30th April 2014 at RIT Hassan.

2. Participated in three days workshop on "CADENCE OrCAD PSPICE/PCB design- The analysis and design of electronic circuits and system " held on 12th to 14th January 2015 at Canara Engineering College, Bantwal.

3. Participated in two days workshop on "Self-esteem & work ethics" held on 21st and 22nd January 2015 at SCEM, Mangaluru

4. Participated in one day workshop on "Intellectual Property Rights- significance for Academia in Business & Research" held on 22nd June 2015 at SCEM, Mangaluru

5. Participated in three days workshop on "FEEL teacher-communication" held on 13th to 15th July 2015 at SCEM, Mangaluru

6. Participated in three days workshop on "Advanced learning platform & solutions of iWave" held on 3rd to 5th August 2015 at SCEM, Mangaluru

7. Participated in a two-day workshop on “VLSI Design Using Open Source EDA”, organized by Sahyadri College of Engineering and Management, Mangalore and conducted by M.S. Engineering College, Bangalore on 29th and 30th July 2016.

8. Participated in Road to NBA Accreditation a two-day workshop titled “Outcome Based Education and Blooms Taxonomy” organized by Sahyadri College of Engineering & Management held on 12th and 13th July 2017.

9. Attended three-day “Orientation Course in Values Education” organized at Ramakrishna Institute of Moral and Spiritual Education(RIMSE)-Mysuru from 9th  to 11th April 2018.

10. Attended five days short-term course on ANALOG IC Design – Circuit and Layout Design Methodologies conducted by Entuple Technologies Pvt. Ltd at Sahyadri College of Engineering & Management, Mangaluru from 5th -9th February 2018.

11. Attended two days workshop on “System Design in the Era of Internet of Things” by Prof. Joseph Sifakis – Turing Awardee organized by Sahyadri College of Engineering & Management held on 11th & 12th January 2018.

12. Participated in a one-day seminar on "Intellectual Property Rights: Significance in Business and Research" at Sahyadri College of Engineering and Management, Mangaluru on 6th October 2018.

 

 

Projects and Exhibitions

1. A FPGA Implementation of SVD Processor Used in ICA Computation for Multi-Channel EEG System.

2. Area and Power-efficient VLSI Architecture of Asynchronous Multiplier for Filter Design.

3. Analysis of 4-bit Carry Select/Skip Adder.

4. Digital EMG Bio-Feedback Device for Muscle Strength Improvement.

5. Bank Security System.

Other Activities

·         Faculty Coordinator - Institution of Electronics and Telecommunication Engineers (IETE) Student's Forum (ISF).

·         Department Coordinator - Sahyadri Internation Journal of Research (SIJR).

·         Successfully completed “CMOS Digital VLSI Design” NPTEL FDP course of 08 weeks, mentored by Prof. Sudeb Dasgupta, Department of Electronics & Communication Engineering, IIT Roorkee.