Dr. Anush Bekal
- Department: Electronics & Communication Engineering
- Designation: Associate Professor & Head
- Teaching Experience: 11 Years
- Industry Experience: 1.0 Years
- Research Experience: 5.0 Years
| COURSES | SPECIALIZATION | INSTITUTION | UNIVERSITY |
|---|---|---|---|
| BE | Electronics and Communication | Canara Engineering College | V T U |
| MS | VLSI-CAD | Manipal Academy of Higher Education (MAHE) | Manipal University |
| Ph.D | Analog IC Design (Microelectronics) | Indian Institute of Infomation Technology, Allahabad (IIIT-A) | IIIT-Allahabad |
Membership of Professional Bodies:
Dr. Anush Bekal serves as Associate Professor & Head; Chairperson of the Board of Studies at the Department of Electronics & Communication Engineering (ECE) at Sahyadri College of Engineering & Management (SCEM). He is the Vice-President for Institute Innovation Council (IIC), In-charge of Industry Connect (IC), and also the Nodal Officer of Atal Ranking for Institutes on Innovations & Achievements (ARIIA) at SCEM- a Ministry of Education (MoE) initiative, Govt. of India. He is also the Director & Managing partner of Samarpan Sahyadri Tech LLP, under the wide banner of the Sahyadri Group of Industries.
He completed his Ph.D. in Microelectronics from the prestigious Indian Institute of Information Technology, Allahabad (IIIT-A), M.S in VLSI/CAD from Manipal University (Institute of Eminence), and B.E in Electronics & Communication Engineering from Visvesvaraya Technological University (VTU). He has taught several courses at undergraduate and postgraduate courses, having 9+ years in the field of teaching and research.
In the year 2017, he was shouldered the overall responsibility of the Sahyadri Science Conclave-2018 which gave an exceptional opportunity to the student community from various states & districts in India to interact with Nobel Laureates, eminent scientists, innovators, and recognized experts from both Industry and academia to learn about the latest advances in the field of basic sciences, engineering and management.
His research interest includes Analog and Mixed-Signal VLSI Circuits, Low Power ADCs, Digital Design, Analog Circuit Design, Verilog/VHDL. Some of the EDA tools include Virtuoso, Tanner, VCS, Design Compiler, Xilinx ISE, LTSpice, etc. Recently Dr. Bekal and his team designed, fabricated, and successfully tested variable resolution ADC chip.
Apart from academics, Dr. Bekal loves kids, badminton, traveling, ethnic regional food, cooking, hill stations, and social media. He has been actively participating in the overall developmental activities of the institute at SCEM
For more updates visit: https://www.linkedin.com/in/anushbekal/
Current Research
No Research Details Found.
Awards
No Awards Details Found.
Grants/ Fund
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Research Supervision
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National Patents:
No National Patents Found.
International Patents:
No International Patents Found.
International Journals:
No. of International Journals Publications:3
1. A. Bekal et al., "A 6-bit, Reusable Comparator Stage Based Asynchronous Binary-Search SAR ADC Using Smart Switching Network," IET Circuits, Devices and Systems, vol. 12 (1), pp. 124-131, 2018.
2. A. Bekal et al., "Linear relationship ADC with complimentary switch-based bootstrapped sample and hold circuit," International Journal of Electronics, vol. 104(9) pp. 1427-1446, 2017.
3. A. Bekal, S. Tabassum and M. Goswami, "Low Power Design of a 1V 8-bit 125 fJ Asynchronous SAR ADC with Binary Weighted Capacitive DAC," Journal of Circuits, Systems, and Computers, vol. 26(5), pp. 1750077(1-25), 2016.
No National Journals Found.
Books
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International Conferences:
No. of International Journals Conferences:3
- A. Bekal et al., “A Low Power Preamplifier Latch based Comparator Using 180nm CMOS Technology,” IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia),pp. 208-212, Dec. 2013.
- A. Bekal et al., “A low power 8-bit Asynchronous SAR ADC design using Charge Scaling DAC,” International Symposium on Electronic System Design(ISED), Dec. 2014.
- A. Bekal et al., “An Improved Dynamic Latch Based Comparator for 8-bit Asynchronous SAR ADC,” IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Jul. 2015.
No National Conferences Found.
Workshop / Seminars
No Workshop/Seminar Details Found.
Projects and Exhibitions
No Projects and Exhibitions Details Found.
Other Activities
No Other Activities Details Found.
